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FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
June 2005
FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
Single Channel: FOD060L, FOD260L Dual Channel: FOD063L Features
Compact SO8 package (except FOD260L - 8-pin DIP) Very high speed - 10 MBit/s Superior CMR -- 50 kV/s at 2,000V peak Fan-out of 8 over -40C to +85C Logic gate output Strobable output (single channel devices) Wired OR-open collector U.L. recognized (File # E90700) (pending) UDE approval pending Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface
Description
These optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate. Single channel devices include a strobable output. This output features an open collector, thereby permitting wired OR outputs. The output consists of bipolar transistors in a Bi-CMOS process for reduced power consumption. The coupled parameters are guaranteed over the temperature range of -40C to +85C. A maximum input signal of 5 mA (3 mA for the FODX6XL versions) will provide a minimum output sink current of 13 mA (fan out of 8). An internal noise shield provides superior common mode rejection of typically 50 kV/s at 2,000V common mode.
Applications
Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission
Package
8 1
N/C 1
8 VCC
+1 V
F1
8 VCC
+2 VF _ 3
7 VE
_2
7 V01
6 VO
_ VF2
3
6 V02
8 1
8 1
N/C 4
5 GND
+4
5 GND
Single-channel circuit drawing (FOD060L, FOD260L)
Dual-channel circuit drawing (FOD063L)
Truth Table (Positive Logic)
Input
H L H L H* L*
Enable
H H L L NC* NC*
Output
L H H H L* H*
*Dual channel devices or single channel devices with pin 7 not connected. A 0.1 F bypass capacitor must be connected between pins 8 and 5. (See note 1)
(c)2005 Fairchild Semiconductor Corporation
1
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FOD060L, FOD260L, FOD063L Rev. 1.0.0
FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (No derating required up to 85C)
Parameter
Storage Temperature Operating Temperature EMITTER DC/Average Forward Input Current (each channel) Enable Input Voltage Not to exceed VCC by more than 500 mV Reverse Input Voltage (each channel) Power Dissipation Single Channel Dual Channel DETECTOR Supply Voltage Output Current (each channel) Output Voltage (each channel) Collector Output Power Dissipation Single Channel Dual Channel VCC (1 minute max) IO VO PO 7.0 50 7.0 85 V mA V mW Single Channel VE VR PI VCC + 0.5V 5.0 45 V V mW
Symbol
TSTG TOPR IF
Value
-40 to +125 -40 to +85 50
Units
C C mA
Recommended Operating Conditions
Parameter
Input Current, Low Level Input Current, High Level Supply Voltage, Output Enable Voltage, Low Level (Single Channel) Enable Voltage, High Level (Single Channel) Operating Temperature Fan Out (TTL load) Output Pull-up Resistor
Symbol
IFL IFH VCC VEL VEH TA N RL
Min
0 *6.3 2.7 0 2.0 -40
Max
250 15 3.3 0.8 VCC +85 8
Units
A mA V V V C
330
4K
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less.
2 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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Electrical Characteristics (TA = -40C to +85C unless otherwise specified.) Individual Component Characteristics
Parameter
EMITTER Input Forward Voltage Input Reverse Breakdown Voltage Input Capacitance Input Diode Temperature Coefficient DETECTOR High Level Supply Current Low Level Supply Current (VE = 0.5 V) (IF = 0 mA, VCC = 3.3 V) (VE = 0.5 V) (IF = 10 mA, VCC = 3.3 V) Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage (VCC = 3.3 V, VE = 0.5 V) (VCC = 3.3 V, VE = 2.0 V) (VCC = 3.3 V, IF = 10 mA) (VCC = 3.3 V, IF = 10 mA) (Note 2)
Test Conditions Symbol Min Typ** Max Unit
(IF = 10 mA) TA =25C (IR = 10 A) (VF = 0, f = 1 MHz) (IF = 10 mA) Single Channel Dual Channel Single Channel Dual Channel Single Channel Single Channel Single Channel Single Channel IEL IEH VEH VEL 2.0 0.8 ICCL BVR CIN VF/TA ICCH 7 10 10 15 -1.6 -1.6 mA mA V V mA 5.0 VF 1.8 1.75 V pF mV/C mA V
Switching Characteristics (TA = -40C to +85C, VCC = 3.3 V, IF = 7.5 mA unless otherwise specified.)
AC Characteristics
Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level Pulse Width Distortion Propagation Delay Skew Output Rise Time (10-90%) Output Fall Time (90-10%) Enable Propagation Delay Time to Output High Level Enable Propagation Delay Time to Output Low Level Common Mode Transient Immunity (at Output High Level) Common Mode Transient Immunity (at Output Low Level)
Test Conditions Device
(Note 3) (RL = 350, CL = 15 pF) (Fig. 9) (Note 4) (RL = 350, CL = 15 pF) (Fig. 9) (RL = 350, CL = 15 pF) (Fig. 9) (RL = 350, CL = 15 pF) (Note 5) (RL = 350, CL = 15 pF) (Note 6) (Fig. 9) (RL = 350, CL = 15 pF) (Note 7) (Fig. 12) (VEH = 3 V, RL = 350, CL = 15 pF) (Note 8) (Fig. 10) (VEH = 3 V, RL = 350, CL = 15 pF) (Note 9) (Fig. 10) Single Channel Single Channel All All All All All All All
Symbol
TPLH TPHL |TPHL-TPLH| tPSK tr tf tELH
Min
Typ
Max Unit
90 ns
75
ns
25 40
ns ns ns ns ns
All
tEHL
ns
(RL = 350) (TA =25C) |VCM| = 50 V (IF = 0 mA, VOH (Min.) = 2.0V ) (Note 10) (Fig. 11) (RL = 350) (TA =25C) |VCM| = 50 V (IF = 7.5 mA, VOL (Max.) = 0.8 V) (Note 11) (Fig. 11)
All
|CMH|
25,000
50,000
V/s
All
|CMH|
25,000
50,000
V/s
3 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40C to +85C Unless otherwise specified.)
DC Characteristics
High Level Output Current
Test Conditions Symbol
(IF = 250 A, VCC = 3.3 V, VO = 3.3 V) (Note 2) VE = 2.0 V Single Channel VOL IFT (VCC = 3.3 V, IF = 5 mA, IOL = 13 mA) (Note 2) VE = 2.0 V Single Channel (VCC = 3.3 V, VO = 0.6 V, IOL = 13 mA) (Note 2) VE = 2.0 V Single Channel IOH
Min
Typ**
Max
50
Unit
A
Low Level Output Voltage
0.6
V
Input Threshold Current
5
mA
Isolation Characteristics (TA = -40C to +85C Unless otherwise specified.)
Characteristics
Input-Output Insulation Leakage Current
Test Conditions
(Relative humidity = 45%) (TA = 25C, t = 5 s) (VI-O = 3000 VDC) (Note 12) IIO 10 A, RH < 50%, TA = 25C) (Note 12) ( t = 1 min.) (VI-O = 500 V) (Note 12) (f = 1 MHz) (Note 12)
Device
Symbol
II-O
Min
Typ**
Max
1.0*
Unit
A
Withstand Insulation Test Voltage
FOD060L FOD063L FOD260L
VISO
2500 5000
VRMS
Resistance (Input to Output) Capacitance (Input to Output)
RI-O CI-O
1012 0.6
pF
** All typical values are at VCC = 3.3 V, TA = 25C
Notes
1. The VCC supply to each optoisolator must be bypassed by a 0.1F capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and GND pins of each device. 2. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 3. tPLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 4. tPHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 5. tPSK is the worst case difference between tPHL and tPLH for any devices at the stated test conditions. 6. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 7. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. tELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 9. tEHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 10. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/s). 11. CML - The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/s). 12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
4 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves
Fig. 1 Input Forward Current vs. Forward Voltage
100
Fig. 2 Input Threshold Current vs. Ambient Temperature
2.5
VCC = 3.3V VO = 0.6V
I F - Forward Current (mA)
10
TA = 100C
ITH - Input Threshold Current (mA)
2.0
FOD063L RL = 350, 1k, 4k FOD060L RL = 350, 1k, 4k
1
TA = 85C TA = -40C
1.5
0.1
TA = 0C TA = 25C
1.0
0.01
0.5
FOD260L RL = 350, 1k, 4k
0.001 0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
0.0 -40
-20
0
20
40
60
80
100
VF - Forward Voltage (V)
TA - Ambient Temperature (C)
Fig. 3 Low Level Output Voltage vs. Ambient Temperature
0.6 0.5 0.4 0.3 0.2 0.1 0.0 -40 -20 0 20 40 60 80 100 TA - Ambient Temperature (C)
VE = 2V (Single channel products only) IF = 5mA IO = 13mA
Fig. 4 High Level Output Current vs. Ambient Temperature
20 I OH - High Level Output Current (nA)
V
VOL - Low Level Output Voltage (V)
CC
= 3.3V
16
12
8
4
VO = VCC = 3.3V VE = 2V (Single channel products only) IF = 250 A
0 -40
-20
0
20
40
60
80
100
TA - Ambient Temperature (C)
Fig. 5 Low Level Output Current vs. Ambient Temperature
40 IOL - Low Level Output Current (mA) 35 30 25 20 15 10 5 0 -40
V
CC
Fig. 6 Propagation Delay vs. Ambient Temperature
80
V
CC
= 3.3V
tP - Propagation Delay (ns)
VE = 2V (Single channel products only) VOL = 0.6V IF = 5mA
= 3.3V
70 60 50 40
IF = 7.5mA RL = 350 tPLH - FOD060L, FOD063L tPLH - FOD260L
tPHL - FOD060L, FOD063L
30 20 -20 0 20 40 60 80 100 -40 -20 TA - Ambient Temperature (C)
tPHL - FOD260L
0 20 40 60 80 TA - Ambient Temperature (C)
100
5 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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Typical Performance Curves
Fig. 7 Rise and Fall Times vs. Ambient Temperature
35
V
CC
Fig. 8 Pulse Width Distortion vs. Ambient Temperature
30
V
CC
= 3.3V
= 3.3V
PWD - Pulse Width Distortion (ns)
30
IF = 7.5mA RL = 350
25 20
IF = 7.5mA RL = 350
tr, tf, - Rise, Fall Time (ns)
25 20 15 10 5 0 -40 -20 0 20 40 60 80 100
tr
FOD260L
15
FOD060L
10
FOD063L
5 0 -40
tf
-20
0
20
40
60
80
100
TA - Ambient Temperature (C)
TA - Ambient Temperature (C)
6 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
Pulse Gen. tf = tr = 5 ns ZO = 50 1 2 Input Monitor (IF) 47 3 4 VCC 8 7 6 GND 5 0.1F Bypass
+3.3V
Pulse Gen. ZO = 50 tf = tr = 5 ns IF 1
I F = 7.5 mA
Dual Channel VCC 8 RL 2 3 7 6 5 0.1F Bypass Output VO Monitoring Node +3.3V
Input (I F) t PHL Output (VO ) tPLH
I F = 3.75 mA
RL Output (VO) CL
Input Monitoring Node RM
1.5 V 90% 10% tf tr
CL* 4 GND
Output (VO )
Test Circuit for FOD060L, and FOD260L
Test Circuit for FOD063L
Fig. 9 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
Pulse Generator tr = 5ns Z O = 50
Input Monitor (V E) +3.3V
3.0 V
1
7.5 mA
8 7 6
CL RL Output (VO )
Input (VE ) t EHL t ELH
1.5 V
2 3 4
0.1F bypass
Output (VO ) 1.5 V
5
Fig. 10 Test Circuit tEHL and tELH.
7 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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IF
VCC
Dual Channel
1
IF A B VFF
8
+3.3V
B A 1 2 VFF 3 4 GND VCM VCC 8 RL 7 6 5 0.1F Bypass +3.3V Output VO Monitoring Node
2
7
0.1f bypass
350 Output (VO)
3
6
4
GND VCM Pulse Gen
5
+ - Pulse Generator ZO = 50 Test Circuit for FOD063L
Test Circuit for FOD060L and FOD260L
VCM 0V
Peak
3.3V Switching Pos. (A), IF = 0 VO VO (Min)
CM H
VO (Max) Switching Pos. (B), IF = 7.5 mA CM L
VO 0.5 V
Fig. 11 Test Circuit Common Mode Transient Immunity
8 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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8-Pin SOIC
Package Dimensions (Surface Mount)
PIN 1 ID.
8-Pin Small Outline
0.024 (0.61)
0.164 (4.16) 0.144 (3.66)
SEATING PLANE
0.060 (1.52)
0.202 (5.13) 0.182 (4.63)
0.275 (6.99) 0.155 (3.94)
0.143 (3.63) 0.123 (3.13)
0.010 (0.25) 0.006 (0.16)
0.021 (0.53) 0.011 (0.28)
0.008 (0.20) 0.003 (0.08) 0.050 (1.27) TYP
0.244 (6.19) 0.224 (5.69)
0.050 (1.27)
Lead Coplanarity : 0.004 (0.10) MAX
9 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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8-Pin DIP
Package Dimensions (Through Hole) Package Dimensions (Surface Mount)
0.390 (9.91) 0.370 (9.40)
PIN 1 ID.
4 3 2 1
4
3
2
1
PIN 1 ID.
0.270 (6.86) 0.250 (6.35)
5 6 7 8
0.270 (6.86) 0.250 (6.35)
0.390 (9.91) 0.370 (9.40)
5
6
7
8
SEATING PLANE
0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.140 (3.55) 0.020 (0.51) MIN
SEATING PLANE
0.070 (1.78) 0.045 (1.14)
0.300 (7.62) TYP
0.200 (5.08) 0.140 (3.55)
0.020 (0.51) MIN
0.016 (0.41) 0.008 (0.20)
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 15 MAX 0.300 (7.62) TYP
0.045 [1.14] 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.315 (8.00) MIN 0.405 (10.30) MIN
Lead Coplanarity : 0.004 (0.10) MAX
Package Dimensions (0.4" Lead Spacing)
8-Pin DIP
4
3
2
1
PIN 1 ID.
0.070 (1.78)
0.270 (6.86) 0.250 (6.35)
0.060 (1.52)
5 6 7 8
0.390 (9.91) 0.370 (9.40)
0.100 (2.54) 0.295 (7.49)
0.070 (1.78) 0.045 (1.14)
SEATING PLANE
0.415 (10.54)
0.030 (0.76)
0.200 (5.08) 0.140 (3.55)
0.004 (0.10) MIN
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 0 to 15 0.400 (10.16) TYP
NOTE All dimensions are in inches (millimeters)
10 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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Ordering Information
Option
No Suffix
Order Entry Identifier
FOD260L FOD060L
Description
Through Hole (DIP package only) Surface Mount Lead Form (SOIC-8 package only) Surface Mount Lead Bend (DIP package only) Surface Mount; Tape and reel (DIP package only) Surface Mount; VDE0884 (DIP package only) Surface Mount; Tape and reel, VDE0884 (1000 units per reel) (DIP package only) 0.4" Lead Spacing (DIP package only) 0.4" Lead Spacing, VDE0884 (DIP package only) Tape and Reel (500 units per reel) (SOIC-8 package only) VDE, Tape and Reel (500 units per reel) (SOIC-8 package only) Tape and Reel (2500 units per reel) (SOIC-8 package only) VDE, Tape and Reel (2500 units per reel) (SOIC-8 package only) VDE (SOIC-8 package only)
S SD SV SDV T TV R1 R1V R2 R2V V
FOD260LS FOD260LSD Pending Approval Pending Approval FOD260LT Pending Approval FOD060LR1 Pending Approval FOD060LR2 Pending Approval Pending Approval
Marking Information
DIP
1 1
SOIC
2
60L V X YY S
6
260L V
3 4
2 6
XX YY T1
5
3
4
5
Definitions
1 2 3 4 (DIP) 4 (SOIC) 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option - See order entry table) Two digit year code, e.g., `03' One digit year code, e.g., `3' Two digit work week ranging from `01' to `53' Assembly package code
11 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
8-Pin DIP Carrier Tape Specifications (FOD260L)
12.0 0.1 4.0 0.1 4.0 0.1 O1.55 0.05 1.75 0.10
4.90 0.20
0.30 0.05
7.5 0.1 13.2 0.2 16.0 0.3 10.30 0.20
0.1 MAX
10.30 0.20
O1.6 0.1
User Direction of Feed
Reflow Profile (FOD260L)
* Peak reflow temperature * Time of temperature higher than 245C * Number of reflows 260 C (package surface temperature) 40 seconds or less Three
300 250 Temperature (C) 200 150
10 s 260 245
40 s 100 50
50
100
150 Time (s)
200
250
12 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers
8-Pin SOIC Carrier Tape Specifications (FOD060L, FOD063L)
8.0 0.10 3.50 0.20 0.30 MAX 4.0 0.10 2.0 0.05 O1.5 MIN 1.75 0.10
5.5 0.05 8.3 0.10 12.0 0.3 5.20 0.20
0.1 MAX
6.40 0.20
O1.5 0.1/-0
User Direction of Feed
Reflow Profile (FOD060L, FOD063L)
300 280 260 240 220 200 180 Time above 183C = 90 Sec >245C = 42 Sec 260C
C
160 140 120 100 80 60 40 20 0 0 60 120 180 33 Sec 1.822C/Sec Ramp up rate
270
360
Time (s)
13 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I15
14 FOD060L, FOD260L, FOD063L Rev. 1.0.0
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